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平行式 NAND 系統功耗和能耗計算器

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估算系統的 NAND 平均功耗／能耗是一項有用的程序，有助於確定 NAND 裝置功耗在系統功耗／能耗預算中的作用，以及如何最佳化 NAND 操作的預算。該工具可以估算 NAND 讀取－程式－清除－閒置－待命工作負載中每個主機通道的 NAND 電流／功耗／能耗以及系統 NAND 功耗／能耗。

該計算器的受眾是希望估算 NAND 功耗／能耗的使用者，他們需要瞭解所使用的 NAND 裝置、所使用的 NAND 操作類型、各自的電流 (Icc) 規格、輸出／輸入的位元組數以及各自的 NAND 陣列繁忙時間（如 tR、tPROG、tBERS）。該計算器的使用者應瞭解系統的實體和運作特性，如（但不限於）NAND 主機資料輸入／輸出介面速度、NAND LUNs／晶粒的系統平行使用、NAND 的電壓供應水平、NAND 讀取－程式－閒置－待命工作負載、電路板跡線電容－控制器 DQ 匯流排－以及其他實體系統元素。

Enter a value for each item

Parallel NAND device with DQ[7:0] or DQ[15:0] bus being used by the host system (1 = DQ[7:0] NAND device used, 2 = DQ[15:0] NAND device used)

This value should be either 1 or 2

Number of NAND DQ[7:0] or NAND DQ[15:0] host channels

Number of NAND LUNs/die per host channel

Number of NAND CE# signal per host channel (assumed to be evenly distributed by # of NAND LUNs/die per host channel)

Host NAND interface speed in MT/s (e.g. 50 for 50MT/s, 800 for 800MT/s, etc.)

Capacitive loading of host system per NAND DQ[7:0] or NAND DQ[15:0] channel in pF not including NAND devices Learn More

Host system supplied NAND Vcc in Volts

Host system supplied NAND Vccq in Volts

Host system supplied NAND Vpp in Volts (if used)

Number of NAND LUNs/die per host NAND DQ[7:0] or NAND DQ[15:0] channel are busy (SR5 = 0) with the most used Read operation at the same time Learn More

This value should not be greater than the value used in the 'Number of NAND LUNs/die per host channel' row

Number of bytes outputted associated with the most used Read operation. If using multi-plane operations, include all bytes outputted from all planes.

Number of NAND LUNs/die per host NAND DQ[7:0] or NAND DQ[15:0] channel are busy (SR5 = 0) with the 2nd most used Read operation at the same time Learn More

This value should not be greater than the value used in the 'Number of NAND LUNs/die per host channel' row

Number of bytes ouputted associated with the 2nd most used Read operation. If using multi-plane operations, include all bytes outputted from all planes.

Number of NAND LUNs/die per host NAND DQ[7:0] or NAND [15:0] channel are busy (SR5 = 0) with the most used Program operation at the same time Learn More

This value should not be greater than the value used in the 'Number of NAND LUNs/die per host channel' row

Number of bytes inputted associated with the most used Program operation. If using multi-plane operations, include all bytes inputted for all planes.

Number of NAND LUNs/die per host NAND DQ[7:0] or NAND DQ[15:0] channel that are busy (SR5 = 0) with the most used Erase operation at the same time Learn More

This value should not be greater than the value used in the 'Number of NAND LUNs/die per host channel' row

NAND mode of operation used by the host system (1 = Async mode, 2 = NV-DDR/NV-DDR2/NV-DDR3 mode, 3 = NV-LPDDR4 mode)

This value should be 1, 2, or 3

Capacitance of the NAND package DQ[7:0] or DQ[15:0] channel in pF

Number of NAND package DQ[7:0] or DQ[15:0] channels shorted/shared per host NAND DQ[7:0] or DQ[15:0] channel Learn More

NAND array Read current for most used Read operation (e.g. NAND Icc1 specification) in mA Learn More

NAND array Read time (e.g., tR, tR_IWL, etc.) for most used Read operation in microseconds (µs)

NAND array Read current for 2nd most used Read operation (e.g. NAND Icc1 specification) in mA Learn More

NAND array Read time (e.g., tR, tR_IWL, etc.) for 2nd most used Read operations in microseconds (µs)

NAND Program current for most used Program operation (e.g. NAND Icc2 specification) in mA Learn More

NAND Program time (e.g., tPROG) for most used Program operation in microseconds (µs)

NAND Erase current for most used Erase operation (e.g. NAND Icc3 specificaiton) in mA Learn More

NAND Erase time (e.g., tBERS) for most used Erase operation in milliseconds (ms)

NAND Vpp current for most used Read operations (e.g. NAND IPPA1 specification, if used) in mA

NAND Vpp current for 2nd most used Read operations (e.g. NAND IPPA1 specification, if used) in mA

NAND Vpp current for Program operations (e.g. NAND IPPA2 specification, if used) in mA

NAND Vpp current for Erase operations (e.g. NAND IPPA3 specification, if used) in mA

NAND standby current (e.g. NAND Isb and Isbq specification) in µA

NAND Idle current (e.g. Icc5 and Iccq5 specifications) in mA

NAND data output current at the NAND interface speed being used (e.g. NAND Icc4r and Iccq4r specificaiton) in mA

NAND data input current at the NAND interface speed being used (e.g. NAND Icc4w and Iccq4w specification) in mA

NAND array Read current on Vccq rail (e.g. NAND Iccq1 specification) in mA

NAND array Program current on Vccq rail (e.g. NAND Iccq2 specification) in mA

NAND array Erase current on Vccq rail (e.g. NAND Iccq3 specification) in mA

Results

Most used Read Operation %

Most used Program Operation %

% of time a NAND die is in Idle state

2nd most used Read Operation %

Most used Erase Operation %

% of time a NAND die is in Standby state

Total NAND Power per host channel (in W)

Must add up to 100%

Total NAND Energy per host channel (in mJ)

Energy calculations only take into account Read, Program, and Erase inputs

Total NAND Power for all host channels (in W)

Learn More
Must add up to 100%

Total NAND Energy for all host channels (in mJ)

Energy calculations only take into account Read, Program, and Erase inputs

NAND system current per channel (in mA)

NAND system power per channel (in W)

NAND system energy per channel (in mJ)

NAND Vcc rail during NAND array operations

NAND Vccq rail during NAND array operations

NAND Vcc rail during data output

NAND Vccq rail during data output Learn More

NAND Vpp rail during array operations (if used)

NAND system current per channel (in mA)

NAND system power per channel (in W)

NAND system energy per channel (in mJ)

NAND Vcc rail during NAND array operations

NAND Vccq rail during NAND array operations

NAND Vcc rail during data output

NAND Vccq rail during data output Learn More

NAND Vpp rail during array operations (if used)

NAND system current per channel (in mA)

NAND system power per channel (in W)

NAND system energy per channel (in mJ)

NAND Vcc rail during NAND array operations

NAND Vccq rail during NAND array operations

NAND Vcc rail during data input

NAND Vccq rail during data input

NAND Vpp rail during array operations (if used)

NAND system current per channel (in mA)

NAND system power per channel (in W)

NAND system energy per channel (in mJ)

NAND Vcc rail during NAND array operations

NAND Vccq rail during NAND array operations

NAND Vpp rail during array operations (if used)

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平行式 NAND 系統功耗和能耗計算器