DDR3 – How Does It Compare to DDR2?
Next-generation, high-performance DDR3 pushes the envelope in key areas like power consumption, signaling speeds, and bandwidth and brings new levels of performance to desktop, notebook, and server computing applications. Below is a snapshot of how DDR3 stacks up against DDR2.
Feature/Option | DDR2 | DDR3 | DDR3 Advantage |
---|---|---|---|
Voltage (core and I/O) | 1.8V | 1.5V | Reduces memory system power demand |
Standard Low Voltage Option | No | Yes (1.35V) | Offers low-voltage DDR2 that matches standard DDR3 at 1.5V |
Densities (Production) | 256Mb to 4Gb | 1Gb to 4Gb | High-density components enable large memory subsystems with fewer chip counts |
Prefetch (MIN WRITE burst) | 4-bit | 8-bit | Reduced core speed dependency for better yield |
tCK - DLL enabled | 125 Mhz to 400 Mhz | 300 Mhz to 800 Mhz | Supports higher data rates |
Data rate (MT/s per pin) | 533, 667, 800 Mb/s | 800,1066,1333,1600 Mb/s | Migration to higher data bandwidth |
Burst length (BL) | BL4, BL8 | BC4, BL8 | BC4 provides relief from some "BL8" requirements |
Burst type | Fixed, via LMR | (1) Fixed, via MRS (2) OTF, "on-the-fly" |
OTF allows switching between BC4 and BL8 without MRS command |
Data strobes | Differential or single-ended | Differential only | Improves system timing margin by reducing strobe crosstalk |
ODT (On Die Termination) | RTT: 50, 75, 150 ohm | RTT: 20,30,40,60,120 Ohm | More ODT options improves signal fidelity and supports higher data rates |
Dynamic ODT | None | 120, 60 Ohm | Improved signaling in multiple slots; pin reduction in point to point applications |
DQ Driver Impedance | 18 Ohm | 34 Ohm | Optimized for 2-slot and point to point systems |
Drive / ODT Calibration | None | External resistor | Improves accuracy over voltage and temperature |
Multi-purpose register (MPR) | None | Four Registers - 1 defined 3 RFU | Supports read calibration |
Write Leveling | None | DQS captures CK, DQ drives out CK's state |
De-skews fly-by layout used by modules |
Modules |
240-pin SODIMM (unbuffered, registered, fully buffered) |
240-pin UDIMM; RDIMM, FBDIMM tbd; 204-pin SODIMM |
Improved layout, more form factors, and power delivery design; DDR3 also uses fly-by architecture |
Chipset support | Legacy | Latest | Newer chipset features |
Additive Latency | Yes | Yes | Tracks with CAS latency |